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Sunday, 29 June 2014

Building Simulation Models

Modelling can be considered as the abstract representation of a real world system. For a simulation model, the representation should be executable within a simulation environment to analyse the modelled system with respect to modelling objectives [Changho, 2012].

Modular software systems are written in languages that conceal the distinction between libraries and application programs, software libraries are linked to client programs dynamically at execution time. In modular systems, linking occurs at the time of loading and therefore invisible to the user. Such dynamic linking usually implies that at most one copy of any library module exists in memory at a given time, although several client modules may use it concurrently [Franz, 1997].

Visual C++ can be used for developing the DLL for the simulation model because it allows for the rapid prototyping of an application [Whipple, 1999] by using class library concept to develop behavioural models of electronic components [Kenjo, 2001]. SystemC platform would be another solution because it provides the modelling constructs for high level behavioural models, gate level design, mixed C++ and HDL simulations links. TestBuilder platform could be used as a verification library because it provides transaction level modelling features, constrained randomization and automated signal mapping between C++ signals and HDL signals.

References

Changho, S. Tag, G. (2012), Collaborative Modeling Process for Development of Domain-Specific Discrete Event Simulation Systems, IEEE Transactions on Systems, Man and Cybernetics, Volume 42,  Issue 4, pp 532 - 546, ISSN: 1094-6977

Franz, M. (1997), Dynamic linking of software components, Computer  Volume 30,  Issue 3, pp 74 - 81, ISSN: 0018-9162

Whipple, W. L. (1996), Walking Through an Application with Visual C++, May, 1996, pp 359 – 364, ISBN: 0-7803-327 1-7.

Kenjo,T. Kikuchi,T. and Kubo, M. (2001), Developing Educational Software for Mechatronics Simulation, IEEE Transactions on Education, Volume. 44, No. 2, May 2001, pp 359 – 374, ISSN: 0018–9359.

Proteus ISIS software program

Computer simulation involves designing a model of an actual or theoretical physical system, executing the model on a digital computer and analysing the execution output. An electronic simulator, such as ISIS, can be defined as a program that allows for the drawing of schematic circuits and through mathematical models libraries associated with devices, also permit the simulation of components behaviour in accordance with the global behaviour of the circuit. The software simulation often represent an important part of a development environment that provides important tools as routing software, PCB editor (ARES), a design rule checker and so on.

ISIS makes use of SPICE for the simulation. SPICE, an algorithm developed at University of California, Berkeley represents the core of software electronic simulation. Together with PCB editor tools, SPICE simulation has become the standard in electronics industry for speeding up large-scale production. Integrated Development Environments (IDEs) are required together with electronic circuit design tools for writing program codes to test and simulate the operation of the microcontroller before manufacture of the hardware prototype.

Serial Communication Interface of ER400TRS

The growth of wireless communication technologies since it came into existence in 1901 [Razavi, 1996] prompted the emergence of multitude of new applications and standards [Morgado, 2007].  One of such standards includes the use of Radio Frequency (RF) waves such as that in the ER400 modules which consists of a transmitter, receiver and transceiver. Tracking data from a remote location requires wireless solutions. Cables or infrared signals when used could be tedious and cumbersome. If infrared signals or other optical means including lasers are used, good obstacle-free line of sight or expensive and delicate optical fibres would be required. Thus the solution stays in the RF domain such as the 433MHz frequency channel (the license-free ISM band in Europe). ER400TRS can be interfaced with a microcontroller to transmit data between two remote locations.

The Easy-Radio employs radio waves to communicate over air and use serial communication to connect to a host device (computers or peripherals) which implies that it could act as a RF device as well as a serial device. Serial transmission could be defined as the sequential transmission of characters in a sequence over a single line, rather than simultaneously over two or more lines, as in parallel transmission. This serial transmission of UART (Universal Asynchronous Receiver/Transmitter) depends on the mode, whether in synchronous or asynchronous operation. For synchronous data transmission,  a separate clock signal would be used for synchronising the transmitter and receiver clocks while asynchronous makes use of signal edges (start, data and stop bits) for synchronisation.  The data bits of the ER400 modules are Manchester encoded. Manchester encoded bits are characterized by the presence of a zero crossing in the centre of every bit period. This property permits both low cost timing recovery and very fast start-up from a no signal condition [Ducar, 1981].

For handling the serial communication, a digital component, called the UART is required. Gordon Bell invented the UART when he needed some circuitry to connect a Teletype to a PDP‑1, a task that required converting parallel signals into serial signals and vice versa [Santo, 2009]. Although UART would be needed to send and receive serial data, software alone can do this, a process commonly referred to as bit bang [Ganssle, 1999]. UART can be made to operate in either full duplex or half duplex. Full duplex can be defined by the ability of a UART to simultaneously send and receive data. Half duplex would occur when a device must pause either transmit or receive to perform the other. While most microcontroller UARTs are full duplex, most wireless transceivers such as the ER400TRS are half duplex due to the fact that difficulty could arise when two different signals are sent at the same time under the same frequency causing data collision. VHDL as a design language was used in [Fang, 2011] to achieve the transmitter, receiver and baud rate modules of a UART with stable and reliable results.

Serial communication standards such as the RS232 specification which define the physical layer specify other voltage levels as those provided by UARTs, are commonly implemented as Transistor-Transistor Logic (TTL) or Complementary Metal-Oxide-Semiconductor (CMOS) type digital circuits. In order to convert from the TTL/CMOS levels to the required voltage levels on the medium and provide additional amplification, electrical components called line drivers are used; examples of such driver components are the MAX232 Integrated Circuit [Guoxin, 2010].

References

Razavi, B. (1996), Challenges in Portable RF Transceiver Design, IEEE Circuits and Systems Soceity, pp 12 – 25, ISSN: 8755-3996.

Morgado, A. Rivas, V. J. Rio, R. Castro-Lopez, R. Fernandez, F. V. Rosa, J. M. (2007), Behavioural modelling, simulation and synthesis of multi-standard wireless receivers in MATLAB/SIMULINK, Integration, the VLSI journal, Volume 41, pp 269 – 280, ISSN: 0167-9260.

Ducar, R. (1981), Tevatron Serial Data Repeater System, IEEE Transactions on Nuclear Science, Volume 28, Issue 3, pp 2301 - 2302, ISSN: 0018-9499

Santo, B. (2009), 25 microchips that shook the world, IEEE Spectrum, Volume 46 Issue 5, May 2009, pp 34 - 43 ISSN: 0018-9235.

Ganssle, (1999), Bit Banging, Available: http://www.ganssle.com/articles/auart.htm.

Fang, Y. Chen, X. (2011), Design and Simulation of UART Serial Communication Module Based on VHDL, International Workshop on Intelligent Systems and Applications, pp 1 - 4, ISBN: 978-1-4244-9855-0

Guoxin, L. (2010), Wireless transmission of RS232 interface signal based on ZigBee, International Conference on Anti-Counterfeiting Security and Identification in Communication (ASID), July 2010, pp 239 - 241, ISBN: 978-1-4244-6731-0


Virtual Simulation Modelling of Electronic Components

Virtual modelling systems are aimed at simulating real experimental operation and results by means of computer technology [Yang, 2009]. Due to the huge complexity of modern integrated circuits, computer aided circuit analysis and simulation becomes essential and can provide information about circuit performance that makes it weighty and expensive to do with laboratory prototype measurements. Simulation Program with Integrated Circuit Emphasis (SPICE) was created in order to meet the need for accurate modelling of advanced devices [Senapati, 2002]. SPICE simulation has been used for over thirty years to accurately predict the behaviour of electronic circuits [National Instruments, 2012].

Although it could be difficult to build a digital model to exactly represent the behaviour of an actual device under all operating conditions [Macminn, 1986], software packages such as Proteus ISIS can to a large extent model IC devices using C++ programming language. C++ can be used for building simulation and synthesis models at higher levels of abstraction than other languages. System architects and verification engineers build C++ models of hardware systems for architectural exploration, fast prototyping, hardware/software co-design. Often these C++ based models need to express hardware concepts such as concurrency, structural hierarchy and data types. In the transition of C++ from a software programming language to a language for high level modelling of micro-electronic systems, various artefacts were introduced into the language in the form of library elements to express such hardware concepts [Doucet, 2011]. Engineers can quickly build behavioural models using data structures like queues and associative arrays that mimic the functionality of many hardware components without incurring the cost in memory and simulation time of an equivalent HDL behavioural model. Since C++ designs contains a very rich set of language constructs including the memory and runtime required to create models [Haldar, 2008], Apart from hardware software co-design, the C++ model act as an executable specification to the designed hardware and helped in exploring various design options for the hardware and therefore can be used to prove that the designed hardware was equivalent to the C++ software model [Haldar, 2008]. There are several different embodiments of C++ based environments, mostly in the form of hardware modelling libraries built on top of C++ [Doucet, 2011] such as Visual C++.

Circuit simulation softwares has been widely used by the electrical engineering technologists to study the transients of a power system [Xin, 2012] such as lightning-induced voltage calculations [Montano, 2008]. [Munshi, 2004] modelled the effects of metal shorting, energy storage at metal discontinuities and arbitrary polarity sequence of fingers on a surface acoustic wave inter-digital transducer using C++ program. The model proposed made the SAW device amenable to circuit simulation. A mathematical model and a simulation algorithm based on SPICE was proposed in [Yang, 2009] for a virtual experiment system to simulate real experiment via abstracting experiment scenes, instrument objects and element objects from actual experiment and mathematical and solid model with object-oriented method were constructed. Test results showed that the model achieved excellent performance.

References

Senapati, B. and Maiti, C. K. (2002), Advanced SPICE modelling of SiGe HBTs using VBIC model, IEE proceedings – Circuits, Devices and Systems, Volume 149, Issue 2, pp 129 – 135, ISSN: 1350-2409.

Yang, Y. Zhang, L. Zheng, H. (2009), Research on modelling and simulation in virtual experiment system, International Conference on Computer Science & Education, pp 1090 - 1094, ISBN: 978-1-4244-3520-3.

National Instruments, 2012, SPICE Simulation Overview, Available: http://www.ni.com/white-paper/5414/en.

Macminn, S. R. and Thomas R. J. (1986), Microprocessor simulation of synchronous machine dynamics In real-time, IEEE Transactions on Power Systems, Vol. PWRS-I, No. 3, August 1986, pp 220 – 225, ISSN: 0885-8950.

Doucet, F. Gupta, R. Otsuka, M. Schaumont, P. and Shukla, P. (2001), interoperability as a Design Issue in C++ Based Modelling Environments, International Symposium on System Synthesis, pp 87 – 94, ISBN: 1-58113-418-5.

Haldar, M. Singh, G. Prabhakar, S. Dwivedi, B. Ghosh, A. (2008), Construction of Concrete Verification Models from C ++, IEEE Design Automation Conference, June 2008, pp 942 – 927, ISBN:978-1-60558-115-6

Xin, L. Xiang, C. Lei, Q. (2012), Calculation of Lightning Induced Overvoltages on Overhead Lines Based on DEPACT Macromodel Using Circuit Simulation Software,  IEEE Transactions on Electromagnetic Compatibility, Volume 54,  Issue 4, pp 837 - 849, ISSN: 0018-9375.

Montano, R. Theethayi, N. Cooray, V. (2008), An Efficient Implementation of the Agrawal Model for Lightning Induced Voltage Calculations Using Circuit Simulation Software, IEEE Transactions on Circuits and Systems, Volume 55,  Issue 9, pp 2959 - 2965, ISSN: 1549-8328

Munshi, J. Tuli, S. (2004), A circuit simulation compatible surface acoustic wave interdigital transducer macro-model, IEEE Transactions on Ultrasonics, Ferroelectrics and Frequency Control, Volume 51, Issue 7, pp 782 - 784, ISSN: 0885–3010.

Sunday, 8 June 2014

ADC Conversion - Combining ADRESH and ADRESL registers

When writing code for A/D conversion especially using PIC microcontroller, it is often required to read the digital value from the ADRESH and ADRESL registers. Depending on if the ADFM was set to right or left justified, the 10-bit digital value can be obtained.

Right justified is when the 6 MSBs of the ADRESH register are read as '0'
Left justified is when the 6 LSBs of the ADRESL register are read as '0'

For left justified form, 8 bits of the digital value are in the ADRESH register while the remaining 2 bits are in ADRESL register. It is possible to use only the 8-bits from the ADRESH register for left justification while not bothering about the 2 LSBs in the ADRESL register. However, 8-bit resolution of the A/D conversion will be obtained. To obtain a higher resolution (10-bit), the combination can be done by left shifting the contents of the ADRESH register by 2 then right shifting the contents of the ADRESL register by 6 and then perform an OR operation on the result as shown below:

unsigned int x;
unsigned int y;
unsigned int z;

x = ADRESH;
y = ADRESL;
z = (x << 2) | (y >>6);

z now holds a 10-bit number that represents the digital value of the A/D

If right justification is used (ADFM set to 1), a 10-bit A/D value can be obtained by left shifting the contents of the ADRESH register by 6, then right shifting the contents of the ADRESL register by 2, and then perform an OR operation on the result as shown below.

unsigned int x;
unsigned int y;
unsigned int z;

x = ADRESH;
y = ADRESL;
z = (x << 6) | (y >>2);